OpenCPI HDL regression-testing with Xilinx ISE-Logic 12.2
July 22nd, 2010
The OpenCPI HDL/firmware team is setting aside this coming weekend (July 24, 2010) for a regression-testing marathon. We will be using the soon-to-drop Xilinx ISE-Logic 12.2 to rebuild cores, rerun tool flows, add script assertions, and generally do all the fun stuff that accompanies an FPGA vendor-tool minor-release. We will post our results following; but fully expect, barring any showstoppers, to bless ISE 12.2 as the current OpenCPI-supported version for Xilinx-based boards.
Not to forget the love for the other FPGA vendors presently in plan or use with OpenCPI, we look forward to touching on Altera’s Quartus II 10.0 in August.
