Xilinx has bumped the Gen-2 PCIe core to revision 1.4 in ISE 11.4, and the latest drop of OpenCPI supports Gen2 operation with the ML605. We are working with Xilinx to ensure a smooth transition to ISE 12 as soon as it becomes public. A short video of three development systems is linked here.

Shep Siegel developers, opencpi ML605 fpga hardware, V6